| Номер документа в системі: | 356010 |
| Автор: | Mіrosсhnyk M. A., Pakhomov Y. V., Shkil A. S., Kulak E. N., Kucherenko D. Y. |
| Назва документа: | Design automation of easy-tested digital finite state machines = Автоматизація проектування легкотестованих цифрових автоматів |
| УДК | 681.326+004 |
| Мова документу | Англійська |
| Аннотація | Context. The relevance of the work is to provide minimal additional hardware costs during design automation of easy-tested digital devices, which are represented by models of control finite state machines on hardware description languages.
Objective. To develop procedures of models' constructing of easy-tested control finite state machines on hardware description languages and estimate hardware costs for different methods of hardware redundancy introduction to HDL-models of finite state machines.
Method. The introduction to HDL-models of control finite state machines, which are presented in the form of the FSM template, hardware redundancy (additional fragments of the HDL-code), providing the forcing setting of finite state machine into an arbitrarystate without the use of synchronizing sequences. For implementation of this approach, the method of FSM's state table extending is applied, which ensures the mode of bypassing of all nodes of FSM' state diagram in the diagnostic mode.
Results. Simulati |
| Кількість сторінок | С. 117-124. |